Part Number Hot Search : 
PNZ102 PCF85 01DHB B909M A101M LT1723 BFG424F LME0512S
Product Description
Full Text Search
 

To Download 100315SC Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
  ? 1999 fairchild semiconductor corporation ds010960 www.fairchildsemi.com september 1991 revised november 1999 100315 low skew quad clock driver 100315 low skew quad clock driver general description the 100315 contains four low skew differential drivers, designed for generation of multiple, minimum skew differ- ential clocks from a single differential input. this device also has the capability to select a secondary single-ended clock source for use in lower frequency system level test- ing. the 100315 is a 300 series redesign of the 100115 clock driver. features  low output-to-output skew ( 50 ps)  differential inputs and outputs  secondary clock available for system level testing  2000v esd protection  voltage compensated operating range: ? 4.2v to ? 5.7v ordering code: devices also available in tape and reel. specify by appending the suffix letter ?x? to the ordering code. logic diagram pin descriptions note 1: tclk and clksel are single-ended inputs, with internal 50 k ? pull-down resistors. connection diagram truth table l = low voltage level h = high voltage level x = don't care order number package number package descriptions 100315SC m16a 16-lead small outline integrated circuit (soic), jedec ms-012, 0.150 narrow pin names description clkin, clkin differential clock inputs clk 1 ? 4 , clk 1 ? 4 differential clock outputs tclk test clock input (note 1) clksel clock input select (note 1) clksel clkin clkin tclk clk n clk n llhxlh lhlxhl h x x llh hxxhhl
www.fairchildsemi.com 2 100315 absolute maximum ratings (note 2) recommended operating conditions note 2: the ? absolute maximum ratings ? are those values beyond which the safety of the device cannot be guaranteed. the device should not be operated at these limits. the parametric values defined in the electrical characteristics tables are not guaranteed at the absolute maximum rating. the ? recommended operating conditions ? table will define the conditions for actual device operation. note 3: esd testing conforms to mil-std-883, method 3015. dc electrical characteristics (note 4) v ee = ? 4.2v to ? 5.7v, v cc = v cca = gnd, t c = 0 c to + 85 c note 4: the specified limits represent the ? worst case ? value for the parameter. since these ? worst case ? values normally occur at the temperature extremes, additional noise immunity and guard banding can be achieved by decreasing the allowable system operating ranges. ac electrical characteristics v ee = ? 4.2v to ? 4.8, v cc = v cca = gnd note 5: output-to-output skew is defined as the absolute value of the difference between the actual propagation delay for any outputs w ithin the same pack- aged device. the specifications apply to any outputs switching in the same direction either high-to-low (t oshl ), or low-to-high (t oslh ), or in opposite directions both hl and lh (t ost ). parameters t ost and t ps guaranteed by design. storage temperature ? 65 c to + 150 c maximum junction temperature (t j ) + 150 c case temperature under bias (t c )0 c to + 85 c v ee pin potential to ground pin ? 7.0v to + 0.5v input voltage (dc) v cc to + 0.5v output current (dc output high) ? 50 ma operating range (note 2) ? 5.7v to ? 4.2v esd (note 3) 2000v case temperature (t c )0 c to + 85 c supply voltage (v ee ) ? 5.7v to ? 4.2v symbol parameter min typ max units conditions v oh output high voltage ? 1025 ? 955 ? 870 mv v in = v ih(max) loading with v ol output low voltage ? 1830 ? 1705 ? 1620 or v il(min) 50 ? to ? 2.0v v ohc output high voltage ? 1035 mv v in = v ih(min) loading with v olc output low voltage ? 1610 or v il(max) 50 ? to ? 2.0v v ih single-ended input high voltage ? 1165 ? 870 mv guaranteed high signal for all inputs v il single-ended input low voltage ? 1830 ? 1475 mv guaranteed low signal for all inputs i il input low current 0.50 av in = v il(min) i ih input high current v in = v ih(max) clkin, clkin 150 a tclk 250 a clksel 250 a v diff input voltage differential 150 mv required for full output swing v cm common mode voltage v cc ? 2v v cc ? 0.5v v i cbo input leakage current ? 10 av in = v ee i ee power supply current ? 67 ? 35 ma symbol parameter t c = 0 ct c = + 25 ct c = + 85 c units conditions min max min max min max f max maximum clock frequency 750 750 750 mhz t plh propagation delay clkin, ns figures 1, 3 t phl clkin to clk (1 ? 4) , clk (1 ? 4) differential 0.59 0.79 0.62 0.82 0.67 0.87 single-ended 0.59 0.99 0.62 1.02 0.67 1.07 t plh propagation delay, tclk 0.50 1.20 0.50 1.20 0.50 1.20 ns figures 1, 2 t phl to clk (1 ? 4) , clk (1 ? 4) t plh propagation delay, clksel 0.80 1.60 0.80 1.60 0.80 1.60 ns figures 1, 2 t phl to clk (1 ? 4) , clk (1 ? 4) t tlh transition time 0.30 0.80 0.30 0.80 0.30 0.80 ns figures 1, 4 t thl 20% to 80%, 80% to 20% t ost maximum skew opposite edge diff output-to-output variation 50 50 50 ps (note 5) data to output path
3 www.fairchildsemi.com 100315 test circuit note: shown for testing clkin to clk1 in the differential mode. l1, l2, l3 and l4 = equal length 50 ? impedance lines. all unused inputs and outputs are loaded with 50 ? in parallel with 3 pf to gnd. scope should have 50 ? input terminator internally. figure 1. ac test circuit switching waveforms figure 2. propagation delay, tclk, clksel to outputs figure 3. propagation delay, clkin/clkin to outputs figure 4. transition times
www.fairchildsemi.com 4 100315 low skew quad clock driver physical dimensions inches (millimeters) unless otherwise noted 16-lead small outline integrated circuit (soic), jedec ms-012, 0.150 narrow package number m16a fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and fairchild reserves the right at any time without notice to change said circuitry and specifications. life support policy fairchild ? s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. a critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com


▲Up To Search▲   

 
Price & Availability of 100315SC

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X